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@ -26,6 +26,7 @@ use super::MMIO_BASE;
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use volatile_register::*;
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use volatile_register::*;
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use mbox;
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use mbox;
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use gpio;
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use gpio;
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use core::sync::atomic::{compiler_fence, Ordering};
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const UART_BASE: u32 = MMIO_BASE + 0x201000;
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const UART_BASE: u32 = MMIO_BASE + 0x201000;
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@ -77,6 +78,11 @@ impl Uart {
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mbox.buffer[7] = 0; // skip turbo setting
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mbox.buffer[7] = 0; // skip turbo setting
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mbox.buffer[8] = mbox::tag::LAST;
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mbox.buffer[8] = mbox::tag::LAST;
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// Insert a compiler fence that ensures that all stores to the
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// mbox buffer are finished before the GPU is signaled (which
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// is done by a store operation as well).
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compiler_fence(Ordering::SeqCst);
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if let Err(_) = mbox.call(mbox::channel::PROP) {
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if let Err(_) = mbox.call(mbox::channel::PROP) {
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return Err(UartError::MailboxError); // Abort if UART clocks couldn't be set
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return Err(UartError::MailboxError); // Abort if UART clocks couldn't be set
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};
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};
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