mirror of
https://github.com/gnif/vendor-reset
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73 lines
2.1 KiB
Markdown
73 lines
2.1 KiB
Markdown
# Vendor Reset
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The goal of this project is to provide a kernel module that is capable of
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resetting hardware devices into a state where they can be re-initialized or
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passed through into a virtual machine (VFIO). While it would be great to have
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these in the kernel as PCI quirks, some of the reset procedures are very complex
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and would never be accepted as a quirk (ie AMD Vega 10).
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By providing this as an out of tree kernel module, vendors will be able to
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easily create pull requests to add functionality to this module, and users will
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be able to easily update this module without requiring a complete kernel rebuild.
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## Patching the kernel
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TL;DR - No patching required.
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This module has been written to use `ftrace` to hook `pci_dev_specific_reset`,
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allowing it to handle device resets directly without patching the running
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kernel. Simply modprobing the module is enough to enable the reset routines for
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all supported hardware.
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## Requirements
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Ensure your kernel has the following options enabled:
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```
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CONFIG_FTRACE=y
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CONFIG_KPROBES=y
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CONFIG_PCI_QUIRKS=y
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CONFIG_KALLSYMS=y
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CONFIG_KALLSYMS_ALL=y
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CONFIG_FUNCTION_TRACER=y
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```
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## Installing
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This module can be installed either using the standard `make`, `make install`
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pattern, or through `dkms` (recommended).
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dkms install .
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## Usage
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Either `modprobe vendor-reset` or add the device to the appropriate place to
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load it at system boot, such as `/etc/modules` (Debian). Consult your
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distribution's documentation as to the best way to perform this.
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## Supported Devices
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| Vendor | Family | Common Name(s)
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|---|---|---|
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|AMD|Polaris 10|
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|AMD|Polaris 11|
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|AMD|Polaris 12|
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|AMD|Vega 10| Vega 56/64 |
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|AMD|Vega 20| Radeon VII |
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|AMD|Navi 10| 5600XT, 5700, 5700XT
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|AMD|Navi 12| Pro 5600M |
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|AMD|Navi 14| Pro 5300, RX 5300, 5500XT
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## Developing
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If you are a vendor intending to add support for your device to this project
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please first consider two things:
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1. Can you fix your hardware/firmware to reset correctly using FLR or a BUS
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reset?
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2. Is the reset simple enough that it should really be a kernel pci quirk
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(see: kernel/drivers/pci/quirk.c)?
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If you answer yes to either of these questions this project is not for you.
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