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@ -2639,7 +2639,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
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diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
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--- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs
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+++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
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@@ -0,0 +1,375 @@
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@@ -0,0 +1,373 @@
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+// SPDX-License-Identifier: MIT OR Apache-2.0
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+//
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+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
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@ -3005,13 +3005,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
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+ assert_eq!(allocation.num_pages(), 2);
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+ assert_eq!(three_region.num_pages(), 1);
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+
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+ let mut count = 0;
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+ for i in allocation.into_iter() {
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+ for (i, alloc) in allocation.into_iter().enumerate() {
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+ assert_eq!(
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+ i.into_inner().as_usize(),
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+ count * bsp::memory::mmu::KernelGranule::SIZE
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+ alloc.into_inner().as_usize(),
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+ i * bsp::memory::mmu::KernelGranule::SIZE
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+ );
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+ count = count + 1;
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+ }
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+ }
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+}
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@ -3588,7 +3586,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2
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+ bsp::memory::mmu::KernelGranule::SIZE * 2
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+ );
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+
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+ assert_eq!(addr.is_page_aligned(), false);
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+ assert!(!addr.is_page_aligned());
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+
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+ assert_eq!(addr.offset_into_page(), 100);
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+ }
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