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@ -2425,7 +2425,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
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diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
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diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
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--- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs
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--- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs
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+++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
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+++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
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@@ -0,0 +1,239 @@
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@@ -0,0 +1,238 @@
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+// SPDX-License-Identifier: MIT OR Apache-2.0
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+// SPDX-License-Identifier: MIT OR Apache-2.0
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+//
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+//
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+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
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+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
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@ -2531,8 +2531,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_reco
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+ ) -> Option<&mut MappingRecordEntry> {
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+ ) -> Option<&mut MappingRecordEntry> {
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+ self.inner
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+ self.inner
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+ .iter_mut()
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+ .iter_mut()
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+ .filter(|x| x.is_some())
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+ .filter_map(|x| x.as_mut())
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+ .map(|x| x.as_mut().unwrap())
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+ .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
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+ .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
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+ .find(|x| {
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+ .find(|x| {
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+ if x.phys_start_addr != phys_region.start_addr() {
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+ if x.phys_start_addr != phys_region.start_addr() {
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@ -2859,13 +2858,13 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_
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+//--------------------------------------------------------------------------------------------------
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+//--------------------------------------------------------------------------------------------------
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+
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+
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+/// A wrapper type around [Address] that ensures page alignment.
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+/// A wrapper type around [Address] that ensures page alignment.
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+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
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+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
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+pub struct PageAddress<ATYPE: AddressType> {
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+pub struct PageAddress<ATYPE: AddressType> {
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+ inner: Address<ATYPE>,
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+ inner: Address<ATYPE>,
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+}
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+}
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+
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+
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+/// A type that describes a region of memory in quantities of pages.
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+/// A type that describes a region of memory in quantities of pages.
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+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
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+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
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+pub struct MemoryRegion<ATYPE: AddressType> {
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+pub struct MemoryRegion<ATYPE: AddressType> {
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+ start: PageAddress<ATYPE>,
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+ start: PageAddress<ATYPE>,
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+ end_exclusive: PageAddress<ATYPE>,
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+ end_exclusive: PageAddress<ATYPE>,
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@ -2873,7 +2872,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_
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+
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+
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+/// Architecture agnostic memory attributes.
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+/// Architecture agnostic memory attributes.
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+#[allow(missing_docs)]
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+#[allow(missing_docs)]
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+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
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+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
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+pub enum MemAttributes {
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+pub enum MemAttributes {
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+ CacheableDRAM,
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+ CacheableDRAM,
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+ Device,
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+ Device,
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@ -2881,7 +2880,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_
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+
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+
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+/// Architecture agnostic access permissions.
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+/// Architecture agnostic access permissions.
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+#[allow(missing_docs)]
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+#[allow(missing_docs)]
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+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
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+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
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+pub enum AccessPermissions {
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+pub enum AccessPermissions {
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+ ReadOnly,
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+ ReadOnly,
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+ ReadWrite,
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+ ReadWrite,
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@ -2889,7 +2888,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_
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+
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+
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+/// Collection of memory attributes.
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+/// Collection of memory attributes.
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+#[allow(missing_docs)]
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+#[allow(missing_docs)]
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+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
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+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
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+pub struct AttributeFields {
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+pub struct AttributeFields {
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+ pub mem_attributes: MemAttributes,
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+ pub mem_attributes: MemAttributes,
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+ pub acc_perms: AccessPermissions,
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+ pub acc_perms: AccessPermissions,
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