Andre Richter
d09374710d
Some rework on virtual memory code
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- Mostly more spearation of concerns in 15.
- Cleanups in other parts.
2021-03-15 22:07:01 +01:00
Andre Richter
6db8b2bc72
Update toolchain
2021-03-07 21:01:44 +01:00
Andre Richter
a5884321a7
Fix rustdoc warnings
2021-01-29 22:30:02 +01:00
Andre Richter
e7cb61b389
Refactoring
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- Don't wildcard-import from arch modules. Make it explicit.
- Put translation table code into its own module.
- Put boot code in boot.rs instead of cpu.rs
- Other minor changes, most memory subsystem.
2021-01-23 22:43:59 +01:00
Andre Richter
c35a30cd0b
Bump UART to 921_600 baud + other bugfixes
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Fixes #95
Fixes #98
Co-authored-by: Takumasa Sakao <sakataku7@gmail.com>
2021-01-04 17:11:48 +01:00
Andre Richter
f2a891236e
Remove unused feature
2021-01-02 16:00:16 +01:00
Andre Richter
1d2b5ad022
Memory Mapping: Improve various aspects
2021-01-01 21:03:18 +01:00
Andre Richter
44bb3f8942
Update copyright year
2021-01-01 11:28:32 +01:00
Andre Richter
18c7259c60
Default to externally powered RPis
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Addresses issues in #86
2020-12-27 00:06:43 +01:00
Andre Richter
2c3f705051
Update dependencies
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register-rs 1.0.0 now uses UnsafeCell internally, which means we lost the Copy
derive on InMemoryRegister.
Therefore, a small set of changes was needed in the MMU driver to dance around
the static array init depending on a Copy type.
2020-11-23 22:34:20 +01:00
Andre Richter
537f8b0386
readme updates
2020-11-20 22:34:04 +01:00
Andre Richter
02f9f34af3
More sound Phantom in MMIO deref wrapper
2020-11-19 22:53:43 +01:00
Andre Richter
27a1d10cc3
Remove UB in linker script symbol <-> Rust handover
2020-10-05 23:47:18 +02:00
Andre Richter
8fc250fc08
Streamline READMEs
2020-10-04 22:30:07 +02:00
Andre Richter
72215fcdb5
Shorten tutorial names
2020-10-04 22:17:02 +02:00