Andre Richter
c62b79f09b
UART1 output on QEMU. Rework some Readmes.
2018-10-29 22:52:58 +01:00
Andre Richter
b6fafa6191
Use SP_EL1 as EL1 stack instead of SP_EL0
2018-10-27 20:26:47 +02:00
Andre Richter
b1786d5110
Update README.md
2018-10-24 09:06:30 +02:00
Andre Richter
5a7f77eae8
Update README.md
2018-10-24 09:05:33 +02:00
Andre Richter
937397d6b2
Update README.md
2018-10-22 21:59:27 +02:00
Andre Richter
6b4bd0e881
Formatting didn't work. Try again.
2018-10-21 20:20:39 +02:00
Andre Richter
d488436f04
Add myself to License file; Reformat
2018-10-21 20:18:51 +02:00
Andre Richter
f5d97b5723
Restructure Readme
...
Also, closes #5
2018-10-21 20:16:27 +02:00
Andre Richter
a44d487d89
Update .travis.yml
2018-10-16 22:22:13 +02:00
Andre Richter
fb17d56991
Adapter Travis badge to moved repo
2018-10-13 21:32:06 +02:00
Andre Richter
2046da5eab
Add objdump target
2018-10-03 00:02:45 +02:00
Andre Richter
3f92aab6e7
Bump extern crates
...
cortex-a -> 2.2.1
panic-abort -> 0.3.1
2018-10-02 23:47:09 +02:00
Andre Richter
6d135ee441
Makefile: Don't delete kernel8
2018-10-02 23:34:01 +02:00
Andre Richter
37fe055082
Alignment. Binaries from newer Rust version.
2018-10-02 23:16:04 +02:00
Andre Richter
68de789d15
0D: Instruction caching and better benchmark function.
...
The previous benchmark function had a few flaws. First of all, it wasn't
idiomatic Rust, because we used a loop construct that you would expect in C.
Revamped that by using an iterator. Also, the previous benchmark got heavily
optimized by the compiler, which unrolled the inner loop it into a huge sequence
of consecutive loads and stores, resulting in lots of instructions that needed
to be fetched from DRAM. Additionally, instruction caching was not turned on.
The new code compiles into two tight loops, fully leveraging the power of the I
and D caches, and providing an great showcase.
2018-10-02 22:59:27 +02:00
Andre Richter
c65e2e56cd
Add tutorial 0D_cache_performance
2018-10-01 22:04:11 +02:00
Andre Richter
bf2a1fff7e
First part of tutorial: 0C_virtual_memory
2018-09-14 00:16:10 +02:00
Andre Richter
60db699637
Add macOS
2018-09-05 10:13:01 +02:00
Andre Richter
4b1bac7509
First part of tutorial: 0B_exception_levels
...
- Added code
- Missing: README
2018-09-01 18:07:30 +02:00
Andre Richter
08235093c1
Bump cortex-a to v2.0.1
2018-08-26 21:37:46 +02:00
Andre Richter
1ca70bcd56
Check-in kernel8
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Useful for assembly inspection via objdump
2018-08-26 20:34:37 +02:00
Andre Richter
4364173386
New todo entry
2018-08-26 20:33:12 +02:00
Andre Richter
c156a32411
rust-fmt all
2018-08-26 14:02:07 +02:00
Andre Richter
633510262d
Fix wrong Stack address
...
Luckily, this error was non-manifest.
2018-08-26 13:58:12 +02:00
Andre Richter
8fcfc76e74
Add TODO list
2018-08-26 13:51:40 +02:00
Andre Richter
5ca70912fb
Remove unused cortex-a imports.
...
Why doesn't clippy catch this...?
2018-08-24 08:29:13 +02:00
Andre Richter
bc32b52f96
Add gitignore
2018-08-24 00:15:31 +02:00
Andre Richter
21e181c63a
Bump cortex-a to v1.1.0
2018-08-24 00:13:53 +02:00
Andre Richter
0ededdc791
Bump register to v0.2.0
2018-08-23 23:53:55 +02:00
Andre Richter
6ba72c8625
Travis; I always forget about travis...
2018-08-21 22:06:32 +02:00
Andre Richter
c19993934c
Use cargo-xbuild
...
Also, have a config where the individual projects can reuse the same
sysroot.
2018-08-21 21:22:50 +02:00
Andre Richter
8175639399
Correct linker issues
...
The new target is not automatically using PIC.
Need some linker script corrections for errors that were hiding
previously, so that we don't accidentally generate alignment
exceptions on bss size variables that cause the target to fail.
2018-08-20 17:07:18 +02:00
Andre Richter
0d75a8eaf3
Use aarch64-unknown-none target in nightly 🎉
...
We have a generic target for writing bare-metal code
for 64-bit ARM architectures in upstream Rust now.
Use it to get rid of the fully custom target spec.
\o/
2018-08-19 23:42:24 +02:00
Andre Richter
5a71b00422
Merge pull request #4 from wizofe/fix/typo
...
Typo: partition
2018-08-19 01:01:29 +02:00
Andre Richter
c5981b6ccd
Don't invoke clippy via xargo
...
Despite invoking clippy with xargo, it wasnt actually using the custom
target, so we don't need xargo here for now...
The target argument was missing anyways. Using it throws an error.
Needs some more investigation.
2018-08-19 00:42:36 +02:00
Ioannis Valasakis
89aacd85f3
Typo: partition
2018-08-18 22:29:00 +00:00
Andre Richter
969704d498
Use correct sequence of MMIO timer reads
...
As discussed in #2
2018-08-12 17:06:30 +02:00
Andre Richter
0bd363f375
Sync with the newest Embedonomicon
...
https://github.com/rust-embedded/embedonomicon
Closes #3
2018-08-12 16:41:45 +02:00
Andre Richter
1b8b78d0c8
Use precompiled clippy
2018-08-12 16:39:52 +02:00
Andre Richter
907f8dc75c
Remove pending C tutorials
...
Presence of these files caused github to show the project as a C
project.
2018-08-12 16:39:39 +02:00
Andre Richter
6266cd38c6
Install clippy from git.
...
Better chances of compiling on nightly.
2018-07-16 21:59:58 +02:00
Andre Richter
3693bd6e8b
typos
2018-07-16 21:49:40 +02:00
Andre Richter
369dffa457
Make it compile on newest nightly
2018-07-16 21:37:40 +02:00
Andre Richter
747e902761
Rewrite for register-rs.
...
We now have the same API for MMIO and CPU registers.
Makes the code more concise, inntuitive, and improves readability.
https://crates.io/crates/register
2018-07-16 21:24:33 +02:00
Andre Richter
ea39d2ae1f
Update travis for llvm-tools from Rust
2018-06-29 20:15:11 +02:00
Andre Richter
323a346b07
Use llvm objcopy from rust toolchain 🎉
...
Its the last missing util we needed to be a rust-toolchain-only project.
https://github.com/rust-lang/rust/pull/50336
https://github.com/japaric/cargo-binutils
2018-06-29 19:48:42 +02:00
Andre Richter
038c8ac55c
Add travis CI
2018-06-17 14:25:22 +02:00
Andre Richter
69d9890c4a
Update #[lang = "panic_fmt"] -> #[panic_implementation]
...
More info: https://users.rust-lang.org/t/psa-breaking-change-panic-fmt-language-item-removed-in-favor-of-panic-implementation/17875
2018-06-17 13:40:30 +02:00
Andre Richter
8a3f6f5f15
utils: Exit early on build failure
2018-06-17 13:20:25 +02:00
Andre Richter
99f4dc24b3
Change dockcross path to newest upstream release
2018-06-17 13:14:03 +02:00
