From ee52e8e288ef6f00416eed94921c2b0e1acfab73 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 1 Jan 2021 23:12:42 +0100
Subject: [PATCH] Bump UART to 576000 baud

---
 06_drivers_gpio_uart/README.md                |  18 ++++++++++--------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 07_uart_chainloader/README.md                 |   4 ++--
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 6712 -> 6720 bytes
 07_uart_chainloader/demo_payload_rpi4.img     | Bin 6592 -> 6600 bytes
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 08_timestamps/README.md                       |   2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 14_exceptions_part2_peripheral_IRQs/README.md |  12 ++++++------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 15_virtual_mem_part2_mmio_remap/README.md     |  16 ++++++++--------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 utils/miniterm.rb                             |   2 +-
 19 files changed, 127 insertions(+), 103 deletions(-)

diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 33df63e8..0588109d 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -433,7 +433,7 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_drivers_g
 diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -0,0 +1,305 @@
+@@ -0,0 +1,307 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -610,19 +610,21 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +
 +    /// Set up baud rate and characteristics.
 +    ///
-+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-+    /// approximation we can get. A 5 modulo error margin is acceptable for UART and we're now at 0,01 modulo.
++    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
 +    ///
-+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
++    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
++    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
++    ///
++    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
++    /// give the best approximation we can get. A 5 modulo error margin is acceptable for UART and we're
++    /// now at 0.01 modulo.
 +    pub fn init(&mut self) {
 +        // Turn it off temporarily.
 +        self.registers.CR.set(0);
 +
 +        self.registers.ICR.write(ICR::ALL::CLEAR);
-+        self.registers.IBRD.write(IBRD::IBRD.val(13));
-+        self.registers.FBRD.write(FBRD::FBRD.val(1));
++        self.registers.IBRD.write(IBRD::IBRD.val(5));
++        self.registers.FBRD.write(FBRD::FBRD.val(13));
 +        self.registers
 +            .LCRH
 +            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index de0bf813..fdd92f65 100644
--- a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index 1491c84b..2b7d797b 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -222,7 +222,7 @@ diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/
 diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -268,6 +268,15 @@
+@@ -270,6 +270,15 @@
          // readability.
          self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
      }
@@ -238,7 +238,7 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
  }
 
  impl console::interface::Read for PL011Uart {
-@@ -278,18 +287,20 @@
+@@ -280,18 +289,20 @@
                  cpu::nop();
              }
 
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index a002d0525555b040896b5c76cbfb2571010361bd..983c85c293b8c3a8cf564f8951f2ae20016e22c5 100755
GIT binary patch
delta 1105
zcmaJ<OK1~O6uoaIlP20WnI@B8P1BfaGf@|{)mmI+N-0VU3PD{cXzK^DsI>@g6q<^N
z;D<i05;uaMRSJR<m1bpw;KGG;p~aPq6(o%)xKJ3i#yiaef8c}5aL>DQ&b{Z|>8_cs
zd-YP|O9xzK0Qbzdz~e?CBK5Hb2=W<u-<%5!D-Sp#N2EN%^KzfY+W8SjHdA>5d<|qX
zmslH*-^ADQAS)G8j_pihZFpMQD5(J)bw+VkxgoJYVbr;cDO9TW7M|68lUcm*ba_=`
zZ}4g3es%?QkHLm;#FJpR@rtKU@6dQf25#0l^LAr#Si#Lc;N^Blek+Mq+LgSUaD4*5
zdbYU765IzcdGa<6c$?iU%IDT=GzcE|rri@!{!pS84SeM7tUsINrtF_8`@m|z&)#Ii
z*%n@|)<~%&r4BL!PpO>^r6?!i$pI3xe^oaty)8D$7qydVm}+X)qW#w0C^S7+fIr><
zW9!)E$hIi%ZfZUh?zb)xdNiz9^;*AmIcyY<Ew*=ms8)kOoHB)j0-%i_7+T4Pm2Bpm
zxsuPzj4%GE=31fkg^TVllFM$j-%2S)aYXZXrW7c;zh*No!eZBOuRn;Nn%1^3o$C~7
z=6ZhwU`OJ6je+c$Bpf&UbdTwT2g@j5AWH{S4Nv;^9;CshST?h~F`KamO*1IQjQ~$;
zP&Dr_p6rcHCx^0`)I@B$a)6$?L^;*iwDt?=w^s2=H(1qiM}8q8=gSG;I^kt{nfWKc
zLo~<`cK8pD|4)d1`kzqJ7AhrprS6xI?Tm{SsXSg2dbe23nO3#yA7^LUmYnT4XRP9O
zN5jHeyO7c3V6I-;a8r&=y`iwT9cbIfuvhc3GliYn9;QN=^nN=%SPBH=iC_&4h?^df
zOCk@U6-bY3p<0z!pgF-sb}t<!?)@VFC|GEfm(Jhyul`b<6}eN?&;8kj1UW1Q4~JVL
zwKld2xunQXU{5IKPHMH=O*kCd&Svp`sGH?+A+%4wF4|QEz5O*PE(qKs@EneXM<s~h
He0bMSPi-b^

delta 1103
zcmZuvO=uHA7@gV8ripEupJtnEW7>^dZGI4xR(tT!Eg`5CEC%tQX#WIlQG+cABG^>K
zi>>W2f+xY?X$yi7mF8qhp%f3Lp!6u43KC;I^q_RBb^SKGLa7c6?Dx%^_ujnyiXC$u
zFYB24_crtxBlJ@Jgh)ipH!(@<QX5H;?OSyqSyM0_VVjs3q7T?4UphdBZP|2X0g(jC
zrYB1hiDc<V_7u+L<F;PRlq7nGJIZYEG-D6b749ih;`15%Im`hx7RkS>`N?9OU#!&`
zJWm(v2k|70xn(TV5x0cz(MRrN%*&Gsi-=ldR}5njHAK`TBIP!lasosvZJgqSer$kl
zxsN-~NTdOwnX!Ac#}jgv_L5Z}4-cU?JYCL#FnPTO7Df8T(_S|iB`WKmEjJ*omVWm{
zU4zY}ted0&iF;3Bk>2vQyK-Ry!ZSS}W?c0i<08!l$q#Qk_R_d7#0x3yMHu;(IYizb
zK{pTLsixBcJ?{$*@F{H)y4QG4tMjI`DM2n=-)`&trt1L&oGfe`Y@|wLNZv;VxNQ1<
zaUWS@G1>mDKM|4m!2#zFA!Vm4rNue9Fv9!W;~XkDx3X!6i>~^PH<zL$2D=M8z78XF
zR{CY$gji;vPmeXk+(kQjwFl}i5M|GXpN=(L>c`o193E9$pG~h1A-IkT#zVV!REUU;
zB--6F7wrekM9ZA|9FxR6)PON)jpSn!`^kDI()4kg@<n2mvIKu6!6|DChzMX_rbqmj
z$9ITS$$_9M_CFCI_$y+(+L4pUdW|ViPOwU~2ZK`{H$}?Z`V+LJcl?v&vsN=naX;xc
z+zeS!8bAz&Q1L)@qE)tKwglUlZUoak_FE4)T4e>|pH*20oH=Lj<}dOW@X5^}sP9;Z
z17^)wz0~MvW)!|dR=?5e@5Xs34s?yXEH;mYnifnpNT|9ri^Xr%pRF23ySjGcS9Yl`
zS+(85FI%<cmO;~WK5#_{Hkq=rWk<B?tF$}V;uLxF^bj2m_TnX42zKHe-3a#K8G1$t
Vc(ayi_g_==wvb^q1zHi#{Q(i3GVuTa

diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index a7c0fdc068b7a1db1a3e23a3c4c940d9805fde3b..979c0dfd3ee8fbc6f5c4485c3bbe440cb6cd26ec 100755
GIT binary patch
delta 1228
zcmZ8hU1$_n6h3!;;*4#R-DH0o=<Mtg$4yKnrtM;-xWNb}f`L`gCwD_0Bw`7T;Onm9
zLquD0bA>{oP}4#?@g=Y=Wc9&a(}(s&lePv#gx!F$Dn3QUA)4{rnH#a*mvhh0J>Pe~
zb7!jkfA!Drkhab%aG3zin}zZhQV;1(glUbGa#cCMqCwU%`k><3{l2xKl+(M!p0Mxa
zePOeUjw_|y<3*r7n7w2ssaa(Y<%6VA-ldEXVzP5;hV-#(>UG>-Q$HzRZrM##tV@rU
z|JkxGlY#QB4_rwiadx|PluWR`wyar-(^+gMf0T6!V63?Nq~(o0;5-}AY(TzHWixGu
zgN=6Dv=qB31Ko<z;VbM#n?VvR63C>fN&m*HG%fJ*5rFBHRjj`!*&Vn)eRCVt&}t?-
z6G)K)`ytS2Ug@N1L=9v7k7Uy8?G{!0d9lStm8Q)CTM1a&>^54LLvw3P4Q?m1?9-ru
z#}5S$@+Lv+t41ds#wN{QW&5$K*zUioy`B3RaQr4ATK^g7s!ZtB4fp$!3Yj$-9FNQ>
z+XzOnPozCX?y@i2Exj@5+){xaYOs^-oyGfu&L#9t-B+9s?+!ZO#<P{LUt5`{t{X*J
zrXi7}GTO0Hf+}dwgX!Uns-@gIVkIE)AIH(}3_9IvwsH|CcQPF6?^bc97}H@cr$2xS
zpTGYGxIh-w@k|<RWG~U4i~}6$edRav6YS%TWNTH0-}xX!Xt-lf5pQh}s2E|W=mW-r
zjpNYI8Vh<W+M2PDE}+GHa||d~$5Wt|qC;FQOSau2jy46}NSc-^M!?l0bafGEFWxAt
z!sq#fe8)uvrtqBh=Z#6XDA^bAW;3BKPJzSb5hjl`4j>H;;fIh0hd+QchBhf|5fmDx
zfRt_jg(Rs*1z*D30U|9<K|u<z?tb<^@#{%n{6dQE<V9TlqEH{FKBp;JyDn>UzijZS
zWt|z%;`E@ad^<EwhNfbO`_8IGd|wi={gaauleoVs;`p|`^?uz?>}+Ij@yDotIv}cy
zxbNd#ymdk3L&85JeEdqh^?rRp<Tp`|3BN_u9~Zu0D}liVq9@|N3D_l(o)`X0R*M??
qQphJ&XOE&I<QUr><Nu6rVtM?Umt)ajKvcJFl44G5f=sdT_|Z4*fn+%V

delta 1162
zcmZ8fOK1~O6uoaIQ!`cDO!Jw<g40RVG*t^)F{p@BtWYc18b#eT#f4P-Pz1qMlHx}E
z(C4ctuBw7M3Zg`z(M_Y9cBA;KiU?IuVnwj{fuY**&dgKP2jRYR@11jR&UvFPBP}<U
z2-VkpFh~Gy=tgm+u$U}`FfEgOW<=~B_k&?+%b?`O4PG>{CNK2vDPSkX^<lD*_WJUf
z$@@STLq2ny#Hl{S-iw<^xwzcdNeE&6Qkp32j&v9Accl5n!Kzh6!oE~%@$sx_k?6$-
zvu#0m6J-x;ddNPutk%%8F?s>%#JPr*1#R43FFcxA1J>70zX`Z646#$STa|Jhtt5SB
zMFd)n*^UDHUaJvckw7}tr_(W9w~_?69sw8_zlZ&=1T%>DgBKQ2KSn=chXM&=uycWW
zy--h6I5mv<+d|yswsVsCEmvitN&~vV#sf)z{~|gehOSOANogegtXa|U^Uca8heS!P
zE!WcyB&l2$%}Lv5+D|02(ZOl3JdzNdxCr#ENa(d0`%GSf^cN8<cbQf;qo~LesY{S&
zY;|2ye%)q0kbrJ}&GyvQ=U%p1#}Vy)>9giMYqL(ojMBcJ$@C}NR#BD#fH)N~?#eb$
zAI2jS4ep#CDW93fSq;$e)R`kcYO|UoqjU_N+Y=78G)d?w=47~<k>5ed@!xv`jzCE&
z<2Nack#)rXu@_+5(jOj~S77sk@tPqCZaGHqR7Y@47Uf4bN?I67a;rA%NGlh#;p&=v
zrn;;RH)Szmy|T--Z=mCRf;uX-W8Y*#H0>N(n*g*y;_^Gn5&HH%&}Qe~un$2)!Xfw+
zn?sS_cI0eC&i21K%Q~&h0&6lUnx5Tp>hhwkf84+s4ri6aIc=}_N6C@6r=*c^dmJST
z>}Dt!yfouzZdikEMC~UQ6rYEBiIR`vpubLuZHcJ*#fX>1cj%rH#{$P^+0n?l+-cS8
z3h=BN^DwUJo&v9jINr}OzG(OS-@lXBe^2e=xQh30=a_FHfXX(iyJJIq>?ki^;rKHf
xQ#E-s<Sq4rO{txvi?v46B*hL#yHio#r*L{F8u;_`d@awbjKmI*JnM_?_ywKuLgN4c

diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 1eb98fc4..1678cf00 100644
--- a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index cf3173bd..dedf93c8 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -309,7 +309,7 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 08_times
 diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -287,11 +287,18 @@
+@@ -289,11 +289,18 @@
                  cpu::nop();
              }
 
diff --git a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b73463..46cceff9 100644
--- a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b73463..46cceff9 100644
--- a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b73463..46cceff9 100644
--- a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b73463..46cceff9 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b73463..46cceff9 100644
--- a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b73463..46cceff9 100644
--- a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index 042c3f60..d9baef35 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -1885,7 +1885,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -190,6 +242,10 @@
+@@ -192,6 +244,10 @@
          self.registers
              .LCRH
              .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
@@ -1896,7 +1896,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          self.registers
              .CR
              .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
-@@ -207,6 +263,35 @@
+@@ -209,6 +265,35 @@
 
          self.chars_written += 1;
      }
@@ -1932,7 +1932,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
-@@ -229,12 +314,18 @@
+@@ -231,12 +316,18 @@
  }
 
  impl PL011Uart {
@@ -1953,7 +1953,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          }
      }
  }
-@@ -254,6 +345,21 @@
+@@ -256,6 +347,21 @@
 
          Ok(())
      }
@@ -1975,7 +1975,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  impl console::interface::Write for PL011Uart {
-@@ -281,25 +387,8 @@
+@@ -283,25 +389,8 @@
 
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
@@ -2003,7 +2003,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
      }
 
      fn clear(&self) {
-@@ -321,3 +410,24 @@
+@@ -323,3 +412,24 @@
          self.inner.lock(|inner| inner.chars_read)
      }
  }
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 29bf95c1..9504cfc3 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -226,19 +226,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index ab11fbfa..77f6ad62 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -1304,10 +1304,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      inner: IRQSafeNullLock<PL011UartInner>,
      irq_number: bsp::device_driver::IRQNumber,
  }
-@@ -232,7 +237,15 @@
-     /// approximation we can get. A 5 modulo error margin is acceptable for UART and we're now at 0,01 modulo.
-     ///
-     /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+@@ -234,7 +239,15 @@
+     /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+     /// give the best approximation we can get. A 5 modulo error margin is acceptable for UART and we're
+     /// now at 0.01 modulo.
 -    pub fn init(&mut self) {
 +    ///
 +    /// # Safety
@@ -1321,7 +1321,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
          // Turn it off temporarily.
          self.registers.CR.set(0);
 
-@@ -249,6 +262,8 @@
+@@ -251,6 +264,8 @@
          self.registers
              .CR
              .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -1330,7 +1330,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      }
 
      /// Send a character.
-@@ -318,13 +333,18 @@
+@@ -320,13 +335,18 @@
      ///
      /// # Safety
      ///
@@ -1352,7 +1352,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
              irq_number,
          }
      }
-@@ -341,7 +361,14 @@
+@@ -343,7 +363,14 @@
      }
 
      unsafe fn init(&self) -> Result<(), &'static str> {
@@ -1368,7 +1368,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
          Ok(())
      }
-@@ -360,6 +387,16 @@
+@@ -362,6 +389,16 @@
 
          Ok(())
      }
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index c2354d43..b2fc254b 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -231,12 +231,14 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     ///
     /// # Safety
     ///
@@ -250,8 +252,8 @@ impl PL011UartInner {
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b73463..46cceff9 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/utils/miniterm.rb b/utils/miniterm.rb
index 0875ada5..010761cd 100755
--- a/utils/miniterm.rb
+++ b/utils/miniterm.rb
@@ -41,7 +41,7 @@ class MiniTerm
     def open_serial
         wait_for_serial
 
-        @target_serial = SerialPort.new(@target_serial_name, 230_400, 8, 1, SerialPort::NONE)
+        @target_serial = SerialPort.new(@target_serial_name, 576_000, 8, 1, SerialPort::NONE)
 
         # Ensure all output is immediately flushed to the device.
         @target_serial.sync = true