diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs index 45fb475a..e0a74caa 100644 --- a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs +++ b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs @@ -174,8 +174,12 @@ impl PL011UartInner { /// Set up baud rate and characteristics. /// - /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the - /// firmware). + /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is: + /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD` + /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best + /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %. + /// + /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt). pub fn init(&mut self) { // Turn it off temporarily. self.registers.CR.set(0); diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs index d1413888..ad2e82cf 100644 --- a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs +++ b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs @@ -174,8 +174,12 @@ impl PL011UartInner { /// Set up baud rate and characteristics. /// - /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the - /// firmware). + /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is: + /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD` + /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best + /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %. + /// + /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt). pub fn init(&mut self) { // Turn it off temporarily. self.registers.CR.set(0); diff --git a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs index e68ede80..c9c5abed 100644 --- a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs +++ b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs @@ -174,8 +174,12 @@ impl PL011UartInner { /// Set up baud rate and characteristics. /// - /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the - /// firmware). + /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is: + /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD` + /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best + /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %. + /// + /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt). pub fn init(&mut self) { // Turn it off temporarily. self.registers.CR.set(0); diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs index e68ede80..c9c5abed 100644 --- a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs +++ b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs @@ -174,8 +174,12 @@ impl PL011UartInner { /// Set up baud rate and characteristics. /// - /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the - /// firmware). + /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is: + /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD` + /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best + /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %. + /// + /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt). pub fn init(&mut self) { // Turn it off temporarily. self.registers.CR.set(0); diff --git a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs index e68ede80..c9c5abed 100644 --- a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs +++ b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs @@ -174,8 +174,12 @@ impl PL011UartInner { /// Set up baud rate and characteristics. /// - /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the - /// firmware). + /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is: + /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD` + /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best + /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %. + /// + /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt). pub fn init(&mut self) { // Turn it off temporarily. self.registers.CR.set(0); diff --git a/11_virtual_memory/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_virtual_memory/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs index e68ede80..c9c5abed 100644 --- a/11_virtual_memory/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs +++ b/11_virtual_memory/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs @@ -174,8 +174,12 @@ impl PL011UartInner { /// Set up baud rate and characteristics. /// - /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the - /// firmware). + /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is: + /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD` + /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best + /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %. + /// + /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt). pub fn init(&mut self) { // Turn it off temporarily. self.registers.CR.set(0); diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs index e68ede80..c9c5abed 100644 --- a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs +++ b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs @@ -174,8 +174,12 @@ impl PL011UartInner { /// Set up baud rate and characteristics. /// - /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the - /// firmware). + /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is: + /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD` + /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best + /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %. + /// + /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt). pub fn init(&mut self) { // Turn it off temporarily. self.registers.CR.set(0); diff --git a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs index e68ede80..c9c5abed 100644 --- a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs +++ b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs @@ -174,8 +174,12 @@ impl PL011UartInner { /// Set up baud rate and characteristics. /// - /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the - /// firmware). + /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is: + /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD` + /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best + /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %. + /// + /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt). pub fn init(&mut self) { // Turn it off temporarily. self.registers.CR.set(0); diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs index 59c70da3..ac9c4e18 100644 --- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs +++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs @@ -226,8 +226,12 @@ impl PL011UartInner { /// Set up baud rate and characteristics. /// - /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the - /// firmware). + /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is: + /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD` + /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best + /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %. + /// + /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt). pub fn init(&mut self) { // Turn it off temporarily. self.registers.CR.set(0); diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs index e68ede80..c9c5abed 100644 --- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs +++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs @@ -174,8 +174,12 @@ impl PL011UartInner { /// Set up baud rate and characteristics. /// - /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the - /// firmware). + /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is: + /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD` + /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best + /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %. + /// + /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt). pub fn init(&mut self) { // Turn it off temporarily. self.registers.CR.set(0);