check_cpu() turns on SSE instructions by clearing bit 15 of HWCR MSR
on legacy AMD processors. Refer to "MSRC001_0015 Hardware Configuration
(HWCR)" of BIOS and Kernel Developer Guide (BKDG) for AMD Family 14h
Models 00h-0Fh Processors [1].
[1] https://www.amd.com/system/files/TechDocs/43170_14h_Mod_00h-0Fh_BKDG.pdf
The coreboot source code has changed since this section was written.
reset16.inc and reset16.ld do not exist in the master branch
of coreboot. Add links to the source code of coreboot v4.11 to point
to the correct files.
Following abf4f68 - removes all references to the deleted [ORG 0x7c00],
and generally mention that the BIOS copies the boot sector into that
fixed memory location
The old links didn't point to valid locations.
Replace the old links with the new links and test those changes with a
small script: https://github.com/initBasti/markdown_link_check .
______________________________________________________________
In order to find and replace the links, I used the following commands:
grep -rwohP '.' -e "\(https\:\/\/0xax.gitbooks.io\/\S*\)" > links.txt
(Find all links recursivly in the project directories and print out the
only the matches links)
Within links.txt:
Remove the '(' & ')' => :%s/\(//g and :%s/\)//g
Remove duplicates => :sort u
Test if the links work with:
python3 md_link_check.py --pattern 0xax.gitbook --output-file bad.txt
(https://github.com/initBasti/markdown_link_check)
Create replace commands:
:%s/.*/grep -rl & '.' | xargs sed -i 's#&##g'
Enter replacement URL between the 2nd & 3rd '#'
Execute commands: :w !sh
Signed-off-by: Sebastian Fricke <sebastian.fricke.linux@gmail.com>
The btsl not only tests the bit, it tests the bit
by transfering it into the carry flag and then sets
it as well. Otherwise the wrmsr would not make sense.
Signed-off-by: Andreas J. Reichel <webmaster@6th-dimension.com>
This patch fixed half of issue of #645:
1.
"The value assigned to it is an offset relative to the offset of the segment"
-->
"The value assigned to it is an offset relative to the segment"
2.
"adding the address field of the instruction and the value of the program counter"
-->
"adding the address field of the instruction to the value of the program counter"
3.
"PAE mode" --> "PAE", because PAE is not a mode.
4.
"5 bit" --> "the 5th bit"
Dongliang Mu
Kagurazaka Kotori
0xAX
Renaud Germain
digitallyamar
yash1120
Kian-Meng, Ang
Jaskaran Singh
slowy07
ImgBotApp
Ródgger Bruno
Tales Lelo da Aparecida
Z
Sebastian Fricke
Jan Sonntag
Roy Kupershmid
Ayyuce Demirbas
Alexander Kuleshov
Arnaud BOIVIN
Andreas J. Reichel
Michael D
Stefan20162016
Bill Wendling
WarpspeedSCP
Jekton Luo
Cao jin