From 4262edbb0f5b30a5dd19fcdd10447e6625995887 Mon Sep 17 00:00:00 2001 From: movEAX Date: Tue, 6 Jun 2017 23:34:30 +0300 Subject: [PATCH] Enhance view of EFER by box-drawing chars --- Initialization/linux-initialization-1.md | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/Initialization/linux-initialization-1.md b/Initialization/linux-initialization-1.md index fa11227..cdb6d9d 100644 --- a/Initialization/linux-initialization-1.md +++ b/Initialization/linux-initialization-1.md @@ -302,17 +302,17 @@ The result will be in the `edx:eax`. General view of the `EFER` is following: ``` 63 32 - -------------------------------------------------------------------------------- -| | -| Reserved MBZ | -| | - -------------------------------------------------------------------------------- +┌───────────────────────────────────────────────────────────────────────────────┐ +│ │ +│ Reserved MBZ │ +│ │ +└───────────────────────────────────────────────────────────────────────────────┘ 31 16 15 14 13 12 11 10 9 8 7 1 0 - -------------------------------------------------------------------------------- -| | T | | | | | | | | | | -| Reserved MBZ | C | FFXSR | LMSLE |SVME|NXE|LMA|MBZ|LME|RAZ|SCE| -| | E | | | | | | | | | | - -------------------------------------------------------------------------------- +┌──────────────────────────────┬───┬───────┬───────┬────┬───┬───┬───┬───┬───┬───┐ +│ │ T │ │ │ │ │ │ │ │ │ │ +│ Reserved MBZ │ C │ FFXSR | LMSLE │SVME│NXE│LMA│MBZ│LME│RAZ│SCE│ +│ │ E │ │ │ │ │ │ │ │ │ │ +└──────────────────────────────┴───┴───────┴───────┴────┴───┴───┴───┴───┴───┴───┘ ``` We will not see all fields in details here, but we will learn about this and other `MSRs` in a special part about it. As we read `EFER` to the `edx:eax`, we check `_EFER_SCE` or zero bit which is `System Call Extensions` with `btsl` instruction and set it to one. By the setting `SCE` bit we enable `SYSCALL` and `SYSRET` instructions. In the next step we check 20th bit in the `edi`, remember that this register stores result of the `cpuid` (see above). If `20` bit is set (`NX` bit) we just write `EFER_SCE` to the model specific register.