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WIP routing

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Michael Stapelberg 4 years ago
parent c8790a7df4
commit 6ab9c90b31
2 changed files with 241 additions and 159 deletions
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316
kinx.kicad_pcb
Unescape Escape View File

@ -3,10 +3,10 @@
(general
(thickness 1.6)
(drawings 29)
(tracks 0)
(tracks 81)
(zones 0)
(modules 16)
(nets 84)
(nets 85)
)
(page A4)
@ -140,38 +140,39 @@
(net 49 "Net-(J3-Pad12)")
(net 50 "Net-(J3-Pad13)")
(net 51 "Net-(J3-Pad9)")
(net 52 "Net-(J4-Pad12)")
(net 53 /COL_5)
(net 54 "Net-(J4-Pad13)")
(net 55 "Net-(J5-Pad10)")
(net 56 "Net-(J5-Pad9)")
(net 57 "Net-(J5-Pad7)")
(net 58 "Net-(J5-Pad6)")
(net 59 /COL_6)
(net 60 "Net-(J6-Pad10)")
(net 61 "Net-(J6-Pad9)")
(net 62 "Net-(J6-Pad2)")
(net 63 "Net-(J6-Pad1)")
(net 64 "Net-(J7-Pad9)")
(net 65 "Net-(J7-Pad3)")
(net 66 "Net-(LED1-Pad1)")
(net 67 "Net-(LED2-Pad1)")
(net 68 "Net-(LED3-Pad1)")
(net 69 "Net-(LED4-Pad1)")
(net 70 /LED_CAPS_LOCK)
(net 71 /LED_NUM_LOCK)
(net 72 /LED_SCROLL_LOCK)
(net 73 /LED_KEYPAD)
(net 74 "Net-(U1-Pad38/A19)")
(net 75 "Net-(U1-Pad37/A18)")
(net 76 "Net-(U1-Pad36/A17)")
(net 77 "Net-(U1-Pad32/A13)")
(net 78 "Net-(U1-Pad31/A12)")
(net 79 "Net-(U1-Pad30)")
(net 80 "Net-(U1-Pad29)")
(net 81 "Net-(U1-Pad28)")
(net 82 "Net-(U1-Pad27)")
(net 83 "Net-(U1-Pad3V3)")
(net 52 /COL_5)
(net 53 "Net-(J5-Pad10)")
(net 54 "Net-(J5-Pad9)")
(net 55 "Net-(J5-Pad7)")
(net 56 "Net-(J5-Pad6)")
(net 57 /COL_6)
(net 58 "Net-(J6-Pad10)")
(net 59 "Net-(J6-Pad9)")
(net 60 "Net-(J6-Pad2)")
(net 61 "Net-(J6-Pad1)")
(net 62 "Net-(J7-Pad9)")
(net 63 "Net-(LED1-Pad1)")
(net 64 "Net-(LED2-Pad1)")
(net 65 "Net-(LED3-Pad1)")
(net 66 "Net-(LED4-Pad1)")
(net 67 /LED_CAPS_LOCK)
(net 68 /LED_NUM_LOCK)
(net 69 /LED_SCROLL_LOCK)
(net 70 /LED_KEYPAD)
(net 71 "Net-(U1-Pad38/A19)")
(net 72 "Net-(U1-Pad37/A18)")
(net 73 "Net-(U1-Pad36/A17)")
(net 74 "Net-(U1-Pad32/A13)")
(net 75 "Net-(U1-Pad31/A12)")
(net 76 "Net-(U1-Pad30)")
(net 77 "Net-(U1-Pad29)")
(net 78 "Net-(U1-Pad28)")
(net 79 "Net-(U1-Pad27)")
(net 80 "Net-(U1-Pad3V3)")
(net 81 "Net-(J4-Pad2)")
(net 82 "Net-(J4-Pad1)")
(net 83 "Net-(J7-Pad11)")
(net 84 "Net-(J7-Pad5)")
(net_class Default "This is the default net class."
(clearance 0.1524)
@ -213,8 +214,8 @@
(add_net "Net-(J3-Pad12)")
(add_net "Net-(J3-Pad13)")
(add_net "Net-(J3-Pad9)")
(add_net "Net-(J4-Pad12)")
(add_net "Net-(J4-Pad13)")
(add_net "Net-(J4-Pad1)")
(add_net "Net-(J4-Pad2)")
(add_net "Net-(J5-Pad10)")
(add_net "Net-(J5-Pad6)")
(add_net "Net-(J5-Pad7)")
@ -223,7 +224,8 @@
(add_net "Net-(J6-Pad10)")
(add_net "Net-(J6-Pad2)")
(add_net "Net-(J6-Pad9)")
(add_net "Net-(J7-Pad3)")
(add_net "Net-(J7-Pad11)")
(add_net "Net-(J7-Pad5)")
(add_net "Net-(J7-Pad9)")
(add_net "Net-(LED1-Pad1)")
(add_net "Net-(LED2-Pad1)")
@ -312,9 +314,9 @@
(fp_line (start 2.45 -1.12) (end 2.45 1.12) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.45 1.12) (end -2.45 1.12) (layer F.CrtYd) (width 0.05))
(pad 2 smd roundrect (at 1.4875 0 90) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 69 "Net-(LED4-Pad1)"))
(net 66 "Net-(LED4-Pad1)"))
(pad 1 smd roundrect (at -1.4875 0 90) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 73 /LED_KEYPAD))
(net 70 /LED_KEYPAD))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_1206_3216Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@ -348,9 +350,9 @@
(fp_line (start 2.45 -1.12) (end 2.45 1.12) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.45 1.12) (end -2.45 1.12) (layer F.CrtYd) (width 0.05))
(pad 2 smd roundrect (at 1.4875 0 90) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 68 "Net-(LED3-Pad1)"))
(net 65 "Net-(LED3-Pad1)"))
(pad 1 smd roundrect (at -1.4875 0 90) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 72 /LED_SCROLL_LOCK))
(net 69 /LED_SCROLL_LOCK))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_1206_3216Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@ -384,9 +386,9 @@
(fp_line (start 2.45 -1.12) (end 2.45 1.12) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.45 1.12) (end -2.45 1.12) (layer F.CrtYd) (width 0.05))
(pad 2 smd roundrect (at 1.4875 0 90) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 67 "Net-(LED2-Pad1)"))
(net 64 "Net-(LED2-Pad1)"))
(pad 1 smd roundrect (at -1.4875 0 90) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 71 /LED_NUM_LOCK))
(net 68 /LED_NUM_LOCK))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_1206_3216Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@ -420,9 +422,9 @@
(fp_line (start 2.45 -1.12) (end 2.45 1.12) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.45 1.12) (end -2.45 1.12) (layer F.CrtYd) (width 0.05))
(pad 2 smd roundrect (at 1.4875 0 90) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 66 "Net-(LED1-Pad1)"))
(net 63 "Net-(LED1-Pad1)"))
(pad 1 smd roundrect (at -1.4875 0 90) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 70 /LED_CAPS_LOCK))
(net 67 /LED_CAPS_LOCK))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_1206_3216Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@ -460,7 +462,7 @@
(pad 2 smd roundrect (at 1.4875 0 270) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 34 /3V3))
(pad 1 smd roundrect (at -1.4875 0 270) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 69 "Net-(LED4-Pad1)"))
(net 66 "Net-(LED4-Pad1)"))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_1206_3216Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@ -498,7 +500,7 @@
(pad 2 smd roundrect (at 1.4875 0 270) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 34 /3V3))
(pad 1 smd roundrect (at -1.4875 0 270) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 68 "Net-(LED3-Pad1)"))
(net 65 "Net-(LED3-Pad1)"))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_1206_3216Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@ -536,7 +538,7 @@
(pad 2 smd roundrect (at 1.4875 0 270) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 34 /3V3))
(pad 1 smd roundrect (at -1.4875 0 270) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 67 "Net-(LED2-Pad1)"))
(net 64 "Net-(LED2-Pad1)"))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_1206_3216Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@ -574,7 +576,7 @@
(pad 2 smd roundrect (at 1.4875 0 270) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 34 /3V3))
(pad 1 smd roundrect (at -1.4875 0 270) (size 1.425 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439)
(net 66 "Net-(LED1-Pad1)"))
(net 63 "Net-(LED1-Pad1)"))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_1206_3216Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@ -621,31 +623,31 @@
(fp_line (start 11.25 -2.5) (end 11.25 2.5) (layer B.SilkS) (width 0.2032))
(fp_line (start -10.75 -2.5) (end 11.25 -2.5) (layer B.SilkS) (width 0.2032))
(pad 12 thru_hole circle (at 6.25 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 6 /ROW_8) (solder_mask_margin 0.0635))
(net 8 /ROW_9) (solder_mask_margin 0.0635))
(pad 10 thru_hole circle (at 3.75 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 44 /COL_4) (solder_mask_margin 0.0635))
(net 48 /COL_0) (solder_mask_margin 0.0635))
(pad 8 thru_hole circle (at 1.25 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 39 /ROW_MIN) (solder_mask_margin 0.0635))
(pad 6 thru_hole circle (at -1.25 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 45 /COL_2) (solder_mask_margin 0.0635))
(pad 6 thru_hole circle (at -1.25 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 39 /ROW_MIN) (solder_mask_margin 0.0635))
(pad 4 thru_hole circle (at -3.75 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 48 /COL_0) (solder_mask_margin 0.0635))
(net 44 /COL_4) (solder_mask_margin 0.0635))
(pad 2 thru_hole circle (at -6.25 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 8 /ROW_9) (solder_mask_margin 0.0635))
(net 6 /ROW_8) (solder_mask_margin 0.0635))
(pad 13 thru_hole circle (at 7.5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 5 /ROW_6) (solder_mask_margin 0.0635))
(net 40 /ROW_0) (solder_mask_margin 0.0635))
(pad 11 thru_hole circle (at 5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 7 /ROW_7) (solder_mask_margin 0.0635))
(net 83 "Net-(J7-Pad11)") (solder_mask_margin 0.0635))
(pad 9 thru_hole circle (at 2.5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 64 "Net-(J7-Pad9)") (solder_mask_margin 0.0635))
(net 62 "Net-(J7-Pad9)") (solder_mask_margin 0.0635))
(pad 7 thru_hole circle (at 0 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 42 /COL_3) (solder_mask_margin 0.0635))
(pad 5 thru_hole circle (at -2.5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 46 /COL_1) (solder_mask_margin 0.0635))
(net 84 "Net-(J7-Pad5)") (solder_mask_margin 0.0635))
(pad 3 thru_hole circle (at -5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 65 "Net-(J7-Pad3)") (solder_mask_margin 0.0635))
(net 7 /ROW_7) (solder_mask_margin 0.0635))
(pad 1 thru_hole circle (at -7.5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 40 /ROW_0) (solder_mask_margin 0.0635))
(net 5 /ROW_6) (solder_mask_margin 0.0635))
)
(module Connector_PinHeader_2.54mm:PinHeader_1x10_P2.54mm_Vertical (layer B.Cu) (tedit 59FED5CC) (tstamp 5EE0B059)
@ -678,13 +680,13 @@
(fp_line (start 1.8 -24.65) (end 1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05))
(pad 10 thru_hole oval (at 0 -22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 60 "Net-(J6-Pad10)"))
(net 58 "Net-(J6-Pad10)"))
(pad 9 thru_hole oval (at 0 -20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 61 "Net-(J6-Pad9)"))
(net 59 "Net-(J6-Pad9)"))
(pad 8 thru_hole oval (at 0 -17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 53 /COL_5))
(net 52 /COL_5))
(pad 7 thru_hole oval (at 0 -15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 59 /COL_6))
(net 57 /COL_6))
(pad 6 thru_hole oval (at 0 -12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 8 /ROW_9))
(pad 5 thru_hole oval (at 0 -10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
@ -694,9 +696,9 @@
(pad 3 thru_hole oval (at 0 -5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 5 /ROW_6))
(pad 2 thru_hole oval (at 0 -2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 62 "Net-(J6-Pad2)"))
(net 60 "Net-(J6-Pad2)"))
(pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 63 "Net-(J6-Pad1)"))
(net 61 "Net-(J6-Pad1)"))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x10_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@ -734,19 +736,19 @@
(fp_line (start 1.8 -24.65) (end 1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05))
(pad 10 thru_hole oval (at 0 -22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 55 "Net-(J5-Pad10)"))
(net 53 "Net-(J5-Pad10)"))
(pad 9 thru_hole oval (at 0 -20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 56 "Net-(J5-Pad9)"))
(net 54 "Net-(J5-Pad9)"))
(pad 8 thru_hole oval (at 0 -17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 /ROW_3))
(pad 7 thru_hole oval (at 0 -15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 57 "Net-(J5-Pad7)"))
(net 55 "Net-(J5-Pad7)"))
(pad 6 thru_hole oval (at 0 -12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 58 "Net-(J5-Pad6)"))
(net 56 "Net-(J5-Pad6)"))
(pad 5 thru_hole oval (at 0 -10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 53 /COL_5))
(net 52 /COL_5))
(pad 4 thru_hole oval (at 0 -7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 59 /COL_6))
(net 57 /COL_6))
(pad 3 thru_hole oval (at 0 -5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 4 /ROW_5))
(pad 2 thru_hole oval (at 0 -2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
@ -799,31 +801,31 @@
(fp_line (start 11.25 -2.5) (end 11.25 2.5) (layer B.SilkS) (width 0.2032))
(fp_line (start -10.75 -2.5) (end 11.25 -2.5) (layer B.SilkS) (width 0.2032))
(pad 12 thru_hole circle (at 6.25 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 52 "Net-(J4-Pad12)") (solder_mask_margin 0.0635))
(pad 10 thru_hole circle (at 3.75 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 27 /ROW_F2) (solder_mask_margin 0.0635))
(pad 10 thru_hole circle (at 3.75 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 52 /COL_5) (solder_mask_margin 0.0635))
(pad 8 thru_hole circle (at 1.25 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 26 /ROW_F1) (solder_mask_margin 0.0635))
(pad 6 thru_hole circle (at -1.25 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 42 /COL_3) (solder_mask_margin 0.0635))
(pad 6 thru_hole circle (at -1.25 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 26 /ROW_F1) (solder_mask_margin 0.0635))
(pad 4 thru_hole circle (at -3.75 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 53 /COL_5) (solder_mask_margin 0.0635))
(pad 2 thru_hole circle (at -6.25 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 27 /ROW_F2) (solder_mask_margin 0.0635))
(pad 2 thru_hole circle (at -6.25 -1.65 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 81 "Net-(J4-Pad2)") (solder_mask_margin 0.0635))
(pad 13 thru_hole circle (at 7.5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 54 "Net-(J4-Pad13)") (solder_mask_margin 0.0635))
(pad 11 thru_hole circle (at 5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 26 /ROW_F1) (solder_mask_margin 0.0635))
(pad 11 thru_hole circle (at 5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 52 /COL_5) (solder_mask_margin 0.0635))
(pad 9 thru_hole circle (at 2.5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 44 /COL_4) (solder_mask_margin 0.0635))
(net 25 /ROW_ESC) (solder_mask_margin 0.0635))
(pad 7 thru_hole circle (at 0 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 27 /ROW_F2) (solder_mask_margin 0.0635))
(pad 5 thru_hole circle (at -2.5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 25 /ROW_ESC) (solder_mask_margin 0.0635))
(net 44 /COL_4) (solder_mask_margin 0.0635))
(pad 3 thru_hole circle (at -5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 53 /COL_5) (solder_mask_margin 0.0635))
(pad 1 thru_hole circle (at -7.5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 26 /ROW_F1) (solder_mask_margin 0.0635))
(pad 1 thru_hole circle (at -7.5 0 90) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask)
(net 82 "Net-(J4-Pad1)") (solder_mask_margin 0.0635))
)
(module kinx:39-53-2135 (layer B.Cu) (tedit 5EDFDEC7) (tstamp 5EE09CF3)
@ -1240,11 +1242,11 @@
(pad 39/A20 thru_hole circle (at 15.24 7.62 180) (size 1.4478 1.4478) (drill 0.9652) (layers *.Cu *.Mask)
(net 24 "Net-(U1-Pad39/A20)") (solder_mask_margin 0.0635))
(pad 38/A19 thru_hole circle (at 17.78 7.62 180) (size 1.4478 1.4478) (drill 0.9652) (layers *.Cu *.Mask)
(net 74 "Net-(U1-Pad38/A19)") (solder_mask_margin 0.0635))
(net 71 "Net-(U1-Pad38/A19)") (solder_mask_margin 0.0635))
(pad 37/A18 thru_hole circle (at 20.32 7.62 180) (size 1.4478 1.4478) (drill 0.9652) (layers *.Cu *.Mask)
(net 75 "Net-(U1-Pad37/A18)") (solder_mask_margin 0.0635))
(net 72 "Net-(U1-Pad37/A18)") (solder_mask_margin 0.0635))
(pad 36/A17 thru_hole circle (at 22.86 7.62 180) (size 1.4478 1.4478) (drill 0.9652) (layers *.Cu *.Mask)
(net 76 "Net-(U1-Pad36/A17)") (solder_mask_margin 0.0635))
(net 73 "Net-(U1-Pad36/A17)") (solder_mask_margin 0.0635))
(pad 35/A16 thru_hole circle (at 25.4 7.62 180) (size 1.4478 1.4478) (drill 0.9652) (layers *.Cu *.Mask)
(net 28 "Net-(U1-Pad35/A16)") (solder_mask_margin 0.0635))
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@ -1252,27 +1254,27 @@
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Text Label 7200 2100 2 50 ~ 0
COL_4
Text Label 4450 2300 0 50 ~ 0
Text Label 4450 1800 0 50 ~ 0
ROW_0
Text Label 4450 2200 0 50 ~ 0
Text Label 4450 1900 0 50 ~ 0
ROW_9
Text Label 4450 2100 0 50 ~ 0
ROW_7
Text Label 4450 1900 0 50 ~ 0
Text Label 4450 2300 0 50 ~ 0
ROW_6
Text Label 4450 1800 0 50 ~ 0
Text Label 4450 2200 0 50 ~ 0
ROW_8
Wire Wire Line
4450 1800 5200 1800
@ -551,15 +545,15 @@ Text Notes 10600 3650 0 50 ~ 0
COL_1
Text Notes 9700 2650 0 50 ~ 0
HumbleHacker\nMatrix wiring
Text Notes 1050 3150 2 50 ~ 0
Text Notes 1050 3750 2 50 ~ 0
COL_0
Text Notes 1050 3250 2 50 ~ 0
Text Notes 1050 3650 2 50 ~ 0
COL_1
Text Notes 1050 3350 2 50 ~ 0
Text Notes 1050 3550 2 50 ~ 0
COL_2
Text Notes 1050 3450 2 50 ~ 0
COL_3
Text Notes 1050 3750 2 50 ~ 0
Text Notes 1050 3150 2 50 ~ 0
COL_4
Text Notes 10600 3550 0 50 ~ 0
ROW_EQL
@ -573,17 +567,17 @@ Text Notes 10600 3050 0 50 ~ 0
ROW_4
Text Notes 10600 2950 0 50 ~ 0
ROW_5
Text Notes 1050 4050 2 50 ~ 0
Text Notes 1050 2850 2 50 ~ 0
ROW_6
Text Notes 1050 3950 2 50 ~ 0
Text Notes 1050 2950 2 50 ~ 0
ROW_8
Text Notes 1050 3850 2 50 ~ 0
Text Notes 1050 3050 2 50 ~ 0
ROW_7
Text Notes 1050 3550 2 50 ~ 0
Text Notes 1050 3350 2 50 ~ 0
ROW_MIN
Text Notes 1050 2950 2 50 ~ 0
Text Notes 1050 3950 2 50 ~ 0
ROW_9
Text Notes 1050 2850 2 50 ~ 0
Text Notes 1050 4050 2 50 ~ 0
ROW_0
Text Notes 10600 1050 0 50 ~ 0
ROW_ESC
@ -861,4 +855,8 @@ Wire Wire Line
2000 2150 1600 2150
Wire Wire Line
2000 2050 1600 2050
Text Label 2000 3750 2 50 ~ 0
COL_0
Wire Wire Line
1600 3050 2000 3050
$EndSCHEMATC

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